1. Technical Field
The present invention relates to electronic circuits in general, and in particular to noise suppression circuits. Still more particularly, the present invention relates to a noise suppression circuit for suppressing above-ground noises.
2. Description of the Prior Art
It is widely accepted that standard complementary metal oxide semiconductor (CMOS) static circuits are noise immune, but perform at a relatively slow speed. Thus, for speed-critical circuits, most circuit designers will turn to dynamic techniques that can provide better speed performance. However, one drawback with dynamic circuits is that they usually have a relatively low noise immunity.
For integrated circuits, noise generally comes from two primary sources. The first source is a DC offset between a source and sink circuits, which is commonly referred to as a xe2x80x9cground offset.xe2x80x9d The exact value of the ground offset is determined by the locality of neighboring circuits and their power requirements. Because of the complexity of determining the ground offset value on a per-circuit basis, it is assumed to be a constant across the entire integrated circuit, correlated to the worst-case possible scenario.
The second source of integrated noise arises from neighboring signal lines, and such noise is commonly known as coupling noise. Coupling noise is injected in a three-dimensional manner; that is, horizontally adjacent as well as vertically adjacent neighbors can inject coupling noise onto a signal line. In most circuit designs, vertically adjacent planes are routed in an orthogonal manner, which virtually eliminates most, if not all, vertical coupling problems. Thus, horizontal adjacent switching neighbors are usually the remaining concern for most circuit designs.
Noise injection from a horizontally adjacent neighbor occurs when a signal line is held at a constant voltage, and the adjacent neighbor transitions from the same state as the signal line being held, to an opposite state. Because all the lines are related in a capacitive manner due to the verticality of the lines, the above-mentioned transition induces a drop in the held signal line as well. Furthermore, each side of the signal line may have a neighbor, and each neighbor may be split into multiple signals across the full length of the signal line in question. This situation is a far worse situation than a single consistent neighbor. In other words, each neighboring signal may transition at such a time that an aggregation of injected noise can occur. As a result, a longer and relatively stronger noise injection pulse is formed.
A simple method to reduce or eliminate noise injected by horizontal neighbor signal wires is to relocate the affecting neighbor signal wires. However, this may not be a possible solution if space is a constraint. Another method is to move the source and sink circuits closer together to reduce wire lengths, thus reducing coupling lengths. However, this solution may not be possible because any movement of one circuit nearly always adversely affects another circuit. Yet another method that can be employed is to increase the noise margin of the receiving circuit. However, doing so may mean a large re-design effort and/or a reduction in circuit performance. Consequently, there exists a need to provide an improved method for reducing coupling noise, and in particular coupling noise induced by low-going-high signal transitions. This is because reduction of coupling noise should not require extensive movement of circuits or wires, and should not adversely impact the performance of the integrated circuit.
In accordance with a preferred embodiment of the present invention, a noise suppression circuit for suppressing noises includes a first inverter, a second inverter, and a one-shot circuit. The first inverter, connected to an input line, switches at a first voltage value above which a noise-coupling event is suspected. The second inverter, also connected to the input line, switches at a second voltage value above which a full-switch input is assumed. A first transistor is coupled to the input line. A second transistor passes an output of the second inverter to a gate of the first transistor when an output of the one-shot circuit is high. The third transistor holds the gate of the first transistor low when the output of the one-shot circuit is low.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.